### Make Utility Macros

Macros provide a convenient way to replace one string with another in a makefile. The text is automatically replaced each time the Make utility is run. This makes it easy to change text throughout the makefile without having to edit every line that uses the text. Two common uses of macros are:

- To create a standard makefile for several projects. The macro represents the file name in commands. These file names are defined when you run the Make utility. When you switch to a different project, changing the macro changes the file names the Make utility uses throughout the description file.
- To control the options that the Make utility passes to the compiler, assembler, or linker. When using a macro to specify the options, you can quickly change the options throughout the description file in one easy step.

A macro can be defined:

- in a makefile
- on the command line
- in the TOOLS.INI file
- through inheritance from environment variables

Special Features

- when using a macro, you can substitute text in the macro itself
- the Make utility includes some predefined macros
- if a macro is defined more than once, precedence rules govern which definition is used
- you can also put macros into your TOOLS.INI file

File Specification Macros
Inherited Macros
Directives in Makefiles
Escape Character

Substitution in a Make Utility Macro
Define a Make Utility Macro
Substitution in a Make Utility Macro

Macro Precedence Rules
Macros and Inference Rules in TOOLS.INI